Mr Adrian Jackson

Mr Adrian
Research Architect
+44 (0) 131 650 6470

I have over 20 years of experience in high performance computing, computing hardware, and computational simulation, including being involved with the last three national HPC services:

My main areas of research and work are in parallel computing algorithms, parallel programming techniques, new computing hardware, and program/code optimisation. I also represent EPCC on the OpenACC technical and marketing committees, and I'm a full member of EPSRC peer review college. The current focus of my work are a number of research and implementation projects, including:

  • Architect for DLT4NCM, a collaborative project investigating the application of distributed ledger technology to create networked carbon markets and support the Paris climate change agreement. This involves designing and prototyping semi-permissioned distributed ledger technology to enable the networking of multiple separate markets, each a distinct data domain with separate authority and autonomy. To enable carbon markets to innovate the distributed ledger technology also needs to scale and perform, not be a bottleneck to transactions and trading. Therefore, we are undertaking research to enable the design of a transparent and interoperable ledger technology that can scale to a large number of markets, participants, and transactions from the outset.
  • EPCC Co-I for the EU funded H2020 DEEP-EST (Grant Agreement no. 754304) project, enabling efficient use of novel modular supercomputing architectures. This includes energy and power modelling for computational simulation, and porting and optimising data analytics applications to the computing environment.
  • Architect for the EU funded H2020 NEXTGenIO (Grant Agreement no. 671951) project, designing software and hardware solutions for HPC systems using new memory technologies. Focussing on non-volatile memory technologies and their application in computational simulation, data analytics, and machine learning algorithms.
  • Lead (Co-I) for IPCC collaboration with Intel, funded to optimise and port codes to Intel processor hardware, including Xeon Phi and Xeon processors.
  • Co-I for EPSRC software for the future, providing HPC expertise for advanced big data and compressive sensing algorithms.
  • Working with industry to optimise and parallelise simulation applications, and develop data analytics pipelines.

In the past I've worked on things such as:

My papers and publications are listed in the Edinburgh Research Explorer.

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