HPC research

ParCo Symposium on Xeon Phi experiences

Author: Adrian Jackson
Posted: 20 Jul 2015 | 17:12

ParCo Symposium

Experiences of porting and optimising code for Xeon Phi processors

EPCC is jointly organising a symposium at the ParCo conference on experiences from those working on porting and optimising codes for this architecture about the challenges and successes they have experienced when working with the Xeon Phi, and how these also apply to standard parallel computing hardware.

Next Generation Computational Modelling Summer School

Author: Adrian Jackson
Posted: 15 Jul 2015 | 15:06

Discussions on computing

Myself and Fiona ReidNGCM - Next Generation Computational Modelling recently presented a 2-day course on porting and optimising for the Xeon Phi at the NGCM (Next Generation Computational Modelling) summer academy in Southampton. 

This one-week academy is designed to give PhD students some of the skills they need to undertake the range of computational simulations and data analysis tasks that their work requires.

Day 5 - Wrapping up the week

Author: Adrian Jackson
Posted: 21 Jun 2015 | 20:02

The final analysis and future plans

A week ago we finished our 5 days of intensive work optimising CP2K (and to a lesser extent GS2) for Xeon Phi processors. As discussed in previous blog posts (Day4, Day3, Day2, Day1), this was done in conjunction with research engineers from Colfax, and built on the previous year's work on these codes by EPCC staff through the Intel-funded IPCC project.

Day 4 of IPCC-Colfax work at EPCC

Author: Adrian Jackson
Posted: 12 Jun 2015 | 15:41

MPI and vectorisation: Two ends of the optimisation spectrum

Day four of this week of intensive work optimising codes for Xeon Phi saw a range of work. The majority of the effort focussed on the vectorisation performance of CP2K and GS2; looking at the low level details of the computationally-intensive parts of these codes and seeing whether the compiler is producing vectorised codes, and if not is there anything that can be done to make the code vectorise.

Day 3 of optimising for the Xeon Phi, moving on to vectorisation

Author: Adrian Jackson
Posted: 11 Jun 2015 | 16:01

Moving from OpenMP to vectorisation and MPI

Reality hit home a bit on the third day of our intensive week working with Colfax to optimise codes for the Xeon Phi.

After further implementation and analysis work it appears that the removal of the allocation and deallocation calls from some of the low level routines in CP2K will improve the OpenMP performance on Xeon and Xeon Phi, but only because there is an issue with the Intel compiler that is causing poor performance. The optimisation can see a reduction in runtime of around 20-30% for the OpenMP code, but only with versions 15 and 16 of the Intel compiler, on v14 there is a much smaller performance improvement.

Second day of collaborating with Colfax

Author: Adrian Jackson
Posted: 10 Jun 2015 | 00:08

Day 2: profiling and the start of optimising

After a first day spent getting codes set up and systems running, we got into the profiling of CP2K in anger today and have made some good progress.

Working on the Xeon Phi

Author: Adrian Jackson
Posted: 8 Jun 2015 | 17:48

Intel Parallel Computing Center collaboration with Colfax

We're just kicking off a week's collaboration with Colfax, a US technology company that collaborates heavily with Intel on Xeon Phi optimisation and training for the Xeon Phi. 

MPI 3.1 ratified

Author: Daniel Holmes
Posted: 8 Jun 2015 | 13:17

The MPI 3.1 standard, a minor update to the existing MPI 3.0 Standard, was ratified last week at the latest MPI Forum meeting

Worldwide co-design centres & software development for exascale

Author: Nick Brown
Posted: 24 Feb 2015 | 12:05

The European Exascale Software Initiative is a consortium of 29 organisations and around 100 individuals who are working towards providing key recommendations on European policy with a particular focus on how software can be developed and techniques further improved to help meet the challenges that exascale computing might bring.

The first version of this project, EESI-1, highlighted a number of key areas for further investigation and consideration. The EESI-2 project, which has been running since 2013, has built upon this and focused its attention on these areas.

ParCo 2015 comes to Edinburgh

Author: Mark Sawyer
Posted: 12 Feb 2015 | 10:48

Later this year, The University of Edinburgh is hosting ParCo2015, the International Conference on Parallel Computing.

Pages