EPCC’s ARM system: comparing the performance of MPI implementations

Author: Nick Brown
Posted: 9 Dec 2019 | 12:48

MVAPICH is a high performance implementation of MPI. It is specialised for InfiniBand, Omni-Path, Ethernet/iWARP, and RoCE communication technologies, but people generally use the default module loaded on their system. This is important because, as HPC programmers, we often optimise our codes but overlook the potential performance gains of better choice of MPI implementation.

Benchmarking MPI implementations on ARM

Author: Nick Brown
Posted: 30 Aug 2019 | 11:32

The recent installation of Fulhame, the ARM HPC machine based here in EPCC as part of the Catalyst UK programme, raises plenty of interesting opportunities for exploring the HPC software ecosystem for ARM. One such aspect is the relative performance of different MPI implementations on these machines and this is what I was talking about last week at the MVAPICH User Group (MUG) workshop.

Catalyst UK programme brings Arm-based HPC system to EPCC!

Author: Michele Weiland
Posted: 8 Jan 2019 | 15:08

Earlier this year, HPE announced the Catalyst UK programme: a collaboration with Arm, SUSE and three UK universities to deploy one of the largest Arm-based high performance computing (HPC) installations in the world. EPCC was chosen as the site for one of these systems; the other two are the Universities of Bristol and Leicester.

EPCC's system (called 'Fulhame' after pioneering chemist Elizabeth Fulhame) was delivered and installed in early December. This HPE Apollo 70-based system consists of 64 compute nodes with two 32-core Cavium ThunderX2 processors (ie 4096 cores in total), 128GB of memory composed of 16 DDR4 DIMMs, and Mellanox InfiniBand interconnects. It will be made available to both industry and academia, with the aim to build applications that drive economic growth and productivity as outlined in the UK government’s Industrial Strategy.

PhD studentships: “Exascale research on HPE’s ARM ecosystem”

Author: Mark Parsons
Posted: 8 Dec 2017 | 10:42

EPCC is offering two fully-funded PhD studentships working in collaboration with Hewlett Packard Enterprise and ARM. We are seeking highly talented and motivated graduates to apply for the studentships, beginning in early 2018.

HPC hardware in 2016 and beyond

Author: Adrian Jackson
Posted: 19 Apr 2016 | 23:14

Anyone taking more than a passing interest in HPC hardware recently will have noticed that there are a number of reasonably significant trends coming to fruition in 2016. Of particular interest to me are on-package memory, integrated functionality, and new processor competitors.  Intel Xeon Phi (KNL) Die

On-package memory, memory that is directly attached to the processor, has been promised for a number of years now. The first product of this type I can remember was Micron's Hybrid Memory Cube around 2010/2011, but it's taken a few years for the hardware to become mature enough (or technically feasible and cheap enough) to make it to mass market chips. We now have it in the form of MCDRAM for Intel's upcoming Xeon Phi processor (Knights Landing), and as HBM2 on Nvidia's recently announced P100 GPU.

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