MIC check

Author: Iain Bethune
Posted: 12 Jun 2013 | 13:20

Following on from my recent post on Xeon Phi, thanks to the hard work of our Systems Development Team we now have a fully configured server sporting the two Intel 5110P Many Integrated Core (MIC) co-processor cards installed and ready to go. The imaginately named 'phi' machine is connected to our internal Hydra cluster and is available for staff, students and visitors to port and test their applications.

For those who thrive on system specs, the machine comprises a Supermicro HX515Gi 1U rackmount server with:

  • 2 x Intel Xeon E5-2650 processors (total of 16 2.0GHz Sandy Bridge cores)
  • 64 GB DDR3-1600 ECC memory
  • 2 TB 7.2K RPM SAS local disk ( + NFS external storage)
  • 2 x Intel Xeon Phi 5110P (60 cores, 4-way SMT, peak DP performance 1.01 TFLOP/s)
  • Intel Cluster Studio XE 2013 (Intel C/C++/Fortran Compilers, Intel MPI, Intel performance analysis and debugging tools)

They say a picture is worth a thousand words, so to save further typing, here's a couple of snaps of the system taken as the installation process was being completed:

Xeon Phi card installed into server

Intel Xeon Phi server racked up

Finally, a cut'n'paste from the command line logged into one of the Xeon Phi cards, to show that one really can run 240 virtual hardware threads on this system:

[ibethune @phi-mic0 ibethune]$ cat /proc/cpuinfo
processor : 0
vendor_id : GenuineIntel
processor : 239
vendor_id : GenuineIntel
cpu family : 11
model : 1
model name : 0b/01
stepping : 3
cpu MHz : 1052.630
cache size : 512 KB
physical id : 0
siblings : 240
core id : 59
cpu cores : 60
apicid : 239
initial apicid : 239
fpu : yes
fpu_exception : yes
cpuid level : 4
wp : yes
flags : fpu vme de pse tsc msr pae mce cx8 apic mtrr mca pat fxsr ht syscall nx lm rep_good nopl lahf_lm
bogomips : 2114.06
clflush size : 64
cache_alignment : 64
address sizes : 40 bits physical, 48 bits virtual