April 2016

Getting Wee Archie online: configuring a cluster for network access

Author: Alistair Grant
Posted: 29 Apr 2016 | 14:42

8x8 LED Matrix Connected to Raspberry Pi

At the tail end of last year, the EPCC Outreach team launched Wee Archie, a Raspberry Pi cluster designed to demonstrate parallel concepts and the type of work that is carried out on supercomputers such as ARCHER. Since the launch, Wee Archie has travelled around the UK including to Oxford, Birmingham and Dundee.

Intel compiler on ARCHER

Author: Adrian Jackson
Posted: 26 Apr 2016 | 13:07

Bug

I had a recent query from some users with a problem with the default version of the Intel Fortran compiler on ARCHER (v15.0.2.164).  It was a nice query to get because the users had done all the work already; they'd identified the problem, found a test code that demonstrated it, and told me what the solution would be for them.

Fortunately, the solution was easy, this bug has been fixed in a newer version of the compiler (16.0.2.181), which is installed and available on ARCHER, but just isn't the default (we tend to keep the default version slightly behind the latest release but as new as possible), so they simply have to swap the compiler modules then their code can compile and run correctly.

How using HPC can help businesses compete in today’s world

Author: Mark Parsons
Posted: 22 Apr 2016 | 14:22

Through funded experiments, Fortissimo helps SMEs take advantage of business benefits enabled through HPC technologies. Visit our stand in Hannover Messe to see the world’s first production ‘megacar’ designed and built by the Swedish SME, Koenigsegg.

HPC hardware in 2016 and beyond

Author: Adrian Jackson
Posted: 19 Apr 2016 | 23:14

Anyone taking more than a passing interest in HPC hardware recently will have noticed that there are a number of reasonably significant trends coming to fruition in 2016. Of particular interest to me are on-package memory, integrated functionality, and new processor competitors.  Intel Xeon Phi (KNL) Die

On-package memory, memory that is directly attached to the processor, has been promised for a number of years now. The first product of this type I can remember was Micron's Hybrid Memory Cube around 2010/2011, but it's taken a few years for the hardware to become mature enough (or technically feasible and cheap enough) to make it to mass market chips. We now have it in the form of MCDRAM for Intel's upcoming Xeon Phi processor (Knights Landing), and as HBM2 on Nvidia's recently announced P100 GPU.

Code for failure

Author: Adrian Jackson
Posted: 14 Apr 2016 | 21:02

Writing programs assuming that they will be incorrect

I was thinking about development methodologies and software design principles recently and have decided that one of the things I've learned is that it is essential to write programs with the assumption they are going to fail.

I don't think that any of us like to think that the programs we write or maintain will go wrong, or have mistakes/problems in them. However, as I've discussed previously, it is very hard to develop code without making mistakes: coding mistakes, algorithmic errors, mistaken assumptions, etc...

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