NEXTGenIO is addressing a key challenge not just for Exascale, but for HPC and data intensive computing in general: the challenge of I/O performance.
As core-counts have increased over the years, the performance of I/O subsystems have struggled to keep up with computational performance and have become a key bottleneck on today’s largest systems.
NEXTGenIO is developing a prototype computing platform that uses on-node non-volatile memory, bridging the latency gap between DRAM and disk, thus removing this bottleneck. In addition to the hardware that will be built as part of the project, NEXTGenIO will develop the software stack (from OS and runtime support, to programming models and tools) that goes hand-in-hand with this new hardware architecture.
Two particular focal points are a data- and power-aware job scheduling system, as well as an I/O workload and workflow simulator that will allow us to stress-test our developments. We believe that the new platform being developed by NEXTGenIO will be capable of delivering transformational performance.
NEXTGenIO is a collaboration between HPC centres (EPCC and BSC), hardware developers and system integrators (Intel and Fujitsu), tools developers (TUD and Allinea), and end users (ECMWF and Arctur). The project started on October 1st 2015 and will run for 36 months.
EPCC blog post NEXTGenIO: the next exciting stage begins! (Nov 2016)