Research papers
Below is a selection of EPCC’s research papers from the past two years. To explore all our papers, search the University of Edinburgh's Research Explorer.
Workflows Community Summit 2024: Future Trends and Challenges in Scientific Workflows
Workflows Community Summit 2024: Future Trends and Challenges in Scientific Workflows
Ferreira Da Silva , R., Bard, D., Chard, K., Witt, S. D., Foster, I. T., Goble, C., Godoy, W., Gustafsson, J., Haus, U.-U., Hudson, S., Los, L., Paine, D., Suter, F., Ward, L., Wilkinson, S., Amaris, M., Babuji, Y., Bader, J., Balin, R. & Balouek, D. & 88 others, , 19 Oct 2024.Research output: Working paper › Preprint
Research Software Engineering: Bridging Knowledge Gaps (Dagstuhl Seminar 24161)
Research Software Engineering: Bridging Knowledge Gaps (Dagstuhl Seminar 24161)
Druskat, S., Grunske, L., Jay, C., Katz, D. S. & Chue Hong, N. P., 7 Oct 2024, 4 ed. Schloss Dagstuhl - Leibniz-Zentrum für Informatik. 12 p.Research output: Book/Report › Other report
Research Software Engineering: Bridging Knowledge Gaps (Dagstuhl Seminar 24161)
Research Software Engineering: Bridging Knowledge Gaps (Dagstuhl Seminar 24161)
Druskat, S., Grunske, L., Jay, C., Katz, D. S. & Chue Hong, N. P., 7 Oct 2024, 4 ed. Schloss Dagstuhl - Leibniz-Zentrum für Informatik. 12 p.Research output: Book/Report › Other report
Domain specific abstractions for the development of fast-by-construction dataflow codes on FPGAs
Domain specific abstractions for the development of fast-by-construction dataflow codes on FPGAs
Brown, N., 4 Oct 2024, In: Chips. 3, 4, p. 334-360 26 p., 4.Research output: Contribution to journal › Article › peer-review
Domain specific abstractions for the development of fast-by-construction dataflow codes on FPGAs
Domain specific abstractions for the development of fast-by-construction dataflow codes on FPGAs
Brown, N., 4 Oct 2024, In: Chips. 3, 4, p. 334-360 26 p., 4.Research output: Contribution to journal › Article › peer-review
Accelerating stencils on the Tenstorrent Grayskull RISC-V accelerator
Accelerating stencils on the Tenstorrent Grayskull RISC-V accelerator
Brown, N. & Barton, R., 1 Oct 2024, (Accepted/In press) Proceedings of the International workshop on RISC-V for HPC. IEEE Computer Society PressResearch output: Chapter in Book/Report/Conference proceeding › Conference contribution
Accelerating stencils on the Tenstorrent Grayskull RISC-V accelerator
Accelerating stencils on the Tenstorrent Grayskull RISC-V accelerator
Brown, N. & Barton, R., 1 Oct 2024, (Accepted/In press) Proceedings of the International workshop on RISC-V for HPC. IEEE Computer Society PressResearch output: Chapter in Book/Report/Conference proceeding › Conference contribution
Fully integrating the Flang Fortran compiler with standard MLIR
Fully integrating the Flang Fortran compiler with standard MLIR
Brown, N., 1 Oct 2024, (Accepted/In press) Proceedings of the Tenth Annual Workshop on the LLVM Compiler Infrastructure in HPC. IEEE Computer Society PressResearch output: Chapter in Book/Report/Conference proceeding › Conference contribution
Fully integrating the Flang Fortran compiler with standard MLIR
Fully integrating the Flang Fortran compiler with standard MLIR
Brown, N., 1 Oct 2024, (Accepted/In press) Proceedings of the Tenth Annual Workshop on the LLVM Compiler Infrastructure in HPC. IEEE Computer Society PressResearch output: Chapter in Book/Report/Conference proceeding › Conference contribution
Pragma driven shared memory parallelism in Zig by supporting OpenMP loop directives
Pragma driven shared memory parallelism in Zig by supporting OpenMP loop directives
Kacs, D., Brown, N., Lee, J. & Zarins, J., 1 Oct 2024, (Accepted/In press) Proceedings of the Tenth Annual Workshop on the LLVM Compiler Infrastructure in HPC. Institute of Electrical and Electronics EngineersResearch output: Chapter in Book/Report/Conference proceeding › Conference contribution