The NEXTGenIO hardware has landed: A first step towards unlocking I/O performance for the Exascale

Read the full press announcement here.

The prototype system, which the project has been developing for the past two and a half years, is the first step towards unlocking I/O performance for the Exascale. The use of non-volatile memory is key as this allows us to bridge the gap between memory and storage in traditional HPC systems. The prototype system will be used to explore how the use of NVRAM technology can improve I/O intensive high-performance scientific computing applications.

I/O performance is increasingly becoming a bottleneck across scientific computing, as researchers must deal with larger and larger datasets. This is holding back HPC research in areas such as modelling and simulation, data analytics and deep learning, where the transfer of data from storage to memory is often a significant part of the run time. This time is essentially wasted, as the computation cannot continue until the new data is loaded. By utilising non-volatile memory technologies, large datasets can be accessed as if they were in memory at all times, eliminating the bottleneck and allowing research to proceed. This is transformative for many applications, such as weather forecasting and CFD simulations, which need to produce and analyse huge quantities of data.

The NEXTGenIO project, which began in 2015, is a European Commission-funded Horizon 2020 project which EPCC is proud to lead, and it collaborates with Intel, Fujitsu, BSC, Arctur, ARM, TUD, and ECMWF. Tiago Quintino, Team Leader for Scalability at ECMWF, says: “We run a time-critical operational Weather Forecasting system that features a highly intensive HPC I/O workload. As such, ECMWF is exploring the usage of NVRAM technology within HPC environments to tackle the ever-growing demands for high-density, high-contention I/O systems."

The goal of the NEXTGenIO project has been to build a system from the ground up - both hardware and software - that offers significantly faster I/O than traditional HPC systems, and that is also compatible with current applications. Not all applications can be modified to directly support NVRAM, and instead a full system software stack has been developed to enable such applications to transparently exploit the performance benefits of the new technology. The compute nodes of the NEXTGenIO system are dual-CPU Intel® Xeon® SP nodes of up to 56 cores, each with 192GB of conventional DRAM and 3TB of NVRAM.

Professor Mark Parsons, Director of EPCC and Coordinator of NEXTGenIO, says: “Solving HPC challenges as difficult as this is all about collaboration. NEXTGenIO has brought together all of the key European R&D organisations in this area and I’m really pleased that Fujitsu will be showing the results of our work at ISC this year. NVRAM technology will transform HPC I/O and having a design and manufacturing facility in Europe as capable as Fujitsu’s Augsburg facility has allowed NEXTGenIO to develop one of the first working systems using this revolutionary memory.”